Special chips and circuits

Ultra-thin chips

Ultra-thin microchip: thickness 20 µm

The Institut für Mikroelektronik Stuttgart developed a new process to manufacture microchips with a total thickness of less than 20 µm. The process is based on the generation of cavities in silicon wafers a few micrometers below the surface that enable a breaking off of the chips from the wafer surface after the integration of electronic circuits.

For more information, please go to Fields of activity - Ultra-thin chips

Contrary to this is the common process of manufacturing thin chips is the thinning of the wafers after circuit integration. Using this technology chips with a thickness of 200 micrometers are commonly manufactured.

Contact

For further information, please contact: Christine Harendt

Highvolt CMOS

A 280 v NMOS technology was developed at the IMS as a specialized process with the following key data:
This development aimed for the realization of a high-voltage ASIC containing an eight-channel driver. The driver channels are designed to be accessed with a ttl gage at the input and defined charge and discharge capacities (piezo elements) of 200 v at the output.

These circuits are used in an electronic braille module in which each individual high-voltage ASIC is mounted with a decoder ASIC in COB (chip-on-board) technology.

We are currently developing the next generation highvolt drivier at the IMS. A complete CMOS driver in compact design is developed.

Contact

For further information, please contact: Peter Koroknay